Exemplary embodiments of the present invention relates to semiconductor design technology, and more particularly, to technology for detecting failure of a through-semiconductor-chip via and repairing the failure.
Various types of package methods have been introduced to highly integrate a semiconductor device. In particular, a chip stacking method for constructing one semiconductor device by stacking a plurality of semiconductor chips uses a through-semiconductor-chip via to commonly transfer a signal to the plurality of semiconductor chips. In general, since the semiconductor chip is fabricated using a silicon wafer, the through-semiconductor-chip via may be referred to as a through silicon via (TSV).
Meanwhile, a repairing process of detecting the failure of the through-semiconductor-chip via and replacing the through-semiconductor-chip via having the failure with a redundancy through via is performed in a process of testing the semiconductor device. For reference, since the through-semiconductor-chip via is connected to the plurality of semiconductor chips to commonly transfer the signal to the plurality of semiconductor chips, a repairing process for a certain semiconductor chip should be performed on all of the plurality of semiconductor chips even though the failure occurs in a portion penetrating the certain semiconductor chip.
Since it takes a lot of time to perform the process of testing the semiconductor device, technology for rapidly detecting and effectively repairing the failure of the through-semiconductor-chip via is desired.